The invention relates to non-volatile semiconductor memory systems including a volatile high speed SRAM (static random access memory), a non-volatile E.sup.2 PROM (electrically eraseable programmable read only memory) backup memory, and circuitry for transferring the contents of the SRAM to the E.sup.2 PROM in response to onset of a power interruption or failure.
In the past, core memory systems have been widely used where non-volatile RAMs were required, since the ferrite cores used therein are inherently non-volatile.
The technology for semiconductor memories has advanced rapidly, making semiconductor memories faster, more reliable, and less costly than core memories. However, in applications where non-volatile memory is required, the problems of volatility of available semiconductor RAM storage cells, the slow write speed and wear out factor of E.sup.2 PROM circuits that might otherwise be used as backup memories, the large amounts of power required to sustain data storage in available semiconductor RAMs and to effectuate transfer of data from such RAMs to E.sup.2 PROMs, and the difficulties of storing enough energy in a backup capacitor to effectuate RAM-to-E.sup.2 PROM downloading have combined to prevent semiconductor memories from being widely used where non-volatile memory performance is required.
U. S. Pat. No. 4,591,782 (Germer, issued May 27, 1986) describes a non-volatile memory incorporated into an electric meter in which volatile semiconductor memory is used in conjunction with a backup capacitor and control circuitry. The control circuitry senses the onset of a power failure. The backup capacitor supplies power to effectuate transfer of some of the data from the volatile semiconductor memory to a non-volatile E.sup.2 PROM backup memory. The Germer patent deals with the problem of "wear out" of the E.sup.2 PROMs by not: immediately transferring data from the non-volatile storage to the E.sup.2 PROMs and instead waiting a fixed amount of time until a preset counter "times out". The backup capacitor has sufficient energy storage to maintain power to critical circuits for a long enough period after power failure to permit transfer of the entire contents of the volatile RAM to the non-volatile E.sup.2 PROM. When a momentary power outage causes the voltage of an unregulated DC power supply to fall below a first threshold, a counter is started, but normal operation of the system continues. If the unregulated DC voltage does not rise above a second threshold that is slightly higher than the first threshold before the counter times out, a processor initiates transfer of data from the voltatile RAM to the non-volatile E.sup.2 PROM. If the regulated supply voltage falls below a third threshold at which the processor is no longer able to reliably maintain its operating conditions, a reset signal is produced to reset the processor. The third threshold is set low enough that all data is safely transferred from the volatile RAM to the non-volatile E.sup.2 PROM before the reset signal is generated.
There are several disadvantages of the Germer approach. The requirement of a backup timer and the circuitry using the three thresholds increases overall complexity and cost of the Germer system. The timeout period of the backup timer is constant, so if the current drawn by the E.sup.2 PROM and associated circuitry increases with age or if the storage capacity of the backup capacitors is degraded the timeout period of the timer may be inadequate and data may be lost. The constant duration timeout period does not permit maximum useage of the storage capacity of the backup capacitor, so unnecessary downloading and uploading may occur for short duration power losses even though the backup supply has the capacity to maintain integrity of data in the volatile RAM for the duration of the power loss.
There exist devices called NOVORAMs that combine the functions of an SRAM and an E.sup.2 PROM on a single silicon chip. Data from the SRAM portion may be stored in the non-volatile E.sup.2 PROM portion prior to power loss. However, if power is removed prior to completion of data transfer from the SRAM portion to the E.sup.2 PROM portion, the correctness of data in the E.sup.2 PROM is indeterminate.
It has been a common practice to encrypt data before storing it. Government approved encryption algorithms using a "key word" often are used. The encrypted data usually is stored in magnetic media. If there is a need to destroy the encrypted data, all of it must be erased from the magnetic media. In some cases, the amount of time required to erase the encrypted data from the magnetic media may be unacceptable.
There is an unmet need for a non-volatile memory system which includes a volatile semiconductor RAM and a non-volatile backup memory to which data in the RAM is downloaded during power interruptions and from which data is uploaded into the RAM after power interruptions, wherein the number of downloading operations is minimized in accordance with the duration of power interruption, condition of a backup power source, and current drain of the entire memory system.